Diagram for Reference

This circuit is a Mosfet-based linear voltage regulator with a voltage drop of as low as 60mV at 1A. The circuit uses a 15V-0-15V transformer and employs an IRF540 N-channel Mosfet (Q1) to deliver the regulated 12V output. The gate drive voltage required for the Mosfet is generated using a voltage doubler circuit consisting of diodes D1 & D2 and capacitors C1 & C2. To turn the Mosfet fully on, the gate terminal should be around 10V above the source terminal which is connected to the DC output. The voltage doubler feeds this voltage to the gate via resistor R3. IC2, a TL431 adjustable shunt regulator, is used as the error amplifier. It dynamically adjusts the gate voltage to maintain the regulation at the output. With an adequate heatsink for the Mosfet, the circuit can provide up to 3A output at slightly elevated minimum voltage drop.


Trimpot VR1 is used for fine adjustment of the output voltage. The RC network consisting of R5 and C6 provides error-amplifier compensation. The circuit is provided with short-circuit crowbar protection to guard against an accidental short at the output. This crowbar protection works as follows: under normal working conditions, the voltage across capacitor C5 will be 6.3V and diode D5 will be reverse-biased by the output voltage of 12V. However, during output short-circuit conditions, the output will momentarily drop, causing D5 to conduct. This triggers the MOC3021 Triac optocoupler (IC1) which in turn pulls the gate voltage to ground. This limits the output current. The circuit will remain latched in this state and the input voltage has to be switched off to reset the circuit.

As electrolytic capacitors age, their internal resistance, also known as "equivalent series resistance" (ESR), gradually increases. This can eventually lead to equipment failure. Using this design, you can measure the ESR of suspect capacitors as well as other small resistances. Basically, the circuit generates a low-voltage 100kHz test signal, which is applied to the capacitor via a pair of probes. An op amp then amplifies the voltage dropped across the capacitor’s series resistance and this can be displayed on a standard multimeter. In more detail, inverter IC1d is configured as a 200kHz oscillator.

Its output drives a 4027 J-K flipflop, which divides the oscillator signal in half to ensure an equal mark/space ratio. Two elements of a 4066 quad bilateral switch (IC3c & IC3d) are alternately switched on by the complementary outputs of the J-K flipflop. One switch input (pin 11) is connected to +5V, whereas the other (pin 8) is connected to -5V. The outputs (pins 9 & 10) of these two switches are connected together, with the result being a ±5V 100kHz square wave. Series resistance is included to current-limit the signal before it is applied to the capacitor under test via a pair of test probes. Diodes D1 and D2 limit the signal swing and protect the 4066 outputs in case the capacitor is charged.

Circuit diagram:

 ESR & Low Resistance Test Meter Circuit Diagram

A second pair of leads sense the signal developed across the probe tips. Once again, the signal is limited by diodes (D3 & D4) before begin applied to the remaining two inputs of the 4066 switch (pins 2 & 3 of IC3a & IC3b). These switches direct alternate half cycles to two 1μF capacitors, removing most of the AC component of the signal and providing a simple "sample and hold" mechanism. The 1μF capacitors charge to a DC level that is proportional to the test capacitor’s ESR. This is differentially amplified by op amp IC4 so that it can be displayed on a digital multimeter – 10Ω will be represented by 100mV, 1Ω by 10mV, etc. To calibrate the circuit, first adjust VR1 to obtain 100kHz at TP3.

Next, momentarily short the test probes together and adjust VR4 for 0mV at pin 6 of IC4. That done, set your meter to read milliamps and connect it between TP4 and the negative (-) DMM output. Apply -5V to TP2 and note the current flow, which should be around 2.1mA. Transfer the -5V from TP2 to TP1 and adjust VR2 until the same current (ignore sign) is obtained. Remove the -5V from TP1. Again, set to your meter to read volts and connect it to the DMM outputs. Apply the probes to a 10W resistor and adjust VR3 for a reading of 100mV. Finally, ensure that all capacitors to be tested are always fully discharged before connecting the probes.

Author: Len Cox - Copyright: Silicon Chip Electronics

This design combines power-on and low-battery indication, can operate with any battery voltage up to 15V, has very low current drain (2mA or less) and costs less than $3.50 with new parts. When the battery voltage is above a predetermined minimum, power on is indicated by what appears to be a steadily lit LED. In fact, the LED is being pulsed by a free-running relaxation oscillator formed by IC1c, one gate of a 4093 CMOS quad Schmitt NAND. The frequency of this oscillator should be at least 50Hz, so that it appears to be continuously on while at the same time drawing far less average current than a steadily lit LED.


The series resistor for the LED needs to be selected for each battery voltage, to limit the current to a safe vale or you could use a fixed resistor and a series trimpot for flexibility. Low battery voltage is indicated by the LED pulsing at around 1Hz. The battery voltage is monitored by transistor Q1 and trimpot VR1. Once the voltage at its base falls below 0.6V, Q1 turns off and Q2 turns on to enable the 2-gate oscillator formed by IC1a and IC1b, which runs at 1Hz. The pulses from this oscillator are inverted by IC1d to gate the LED oscillator on and off. Calibration can be done with a variable bench power supply set to the lowest battery voltage you will accept. Power up the circuit and adjust VR1 until the LED pulses once per second.